News & Publications
A Programmable Heterogeneous Microprocessor Based on Bit-scalable In-Memory Computing
Fully Row/Column-Parallel In-Memory Computing SRAM Macro Employing Capacitor-based Mixed-signal Computation With 5-b Inputs
A Programmable Neural-network Inference Accelerator Based on Scalable In-Memory Computing
In-Memory Computing: Advances and Prospects
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